The Conference Parallel Architectures and Compilation Techniques (PACT18) took place from November 1st to 4th in Limassol, Cyprus. This conference aims at presenting leading and innovative research works about Processing-In-Memory, parallel architecture and compilation.
Vasileios Zois, from University of California, Riverside presented the research paper “Massively Parallel Skyline Computation For Processing-In-Memory Architectures”. This paper, which is available here for consultation, describes the research works led by UCR to evaluate UPMEM PIM technology.
Among others, the Skyline operator has applications in multi-criteria search and intinerary search.
The paper demonstrates the efficiency of our technology in the use of the DSky Skyline algorithm : “DSky achieves 2× to 14× higher throughput compared to the state-of-the-art solutions on competing CPU and GPU architectures”. The paper also highlights gains in terms of energy : “an order of magnitude better energy consumption compared to CPUs and GPUs”.
Below is a short presentation of the paper, by Vasileios Zois :